(Sabo & Na asali) A cikin hannun jari 3S200A-4FTG256C IC Chip XC3S200A-4FTG256C

Halayen Samfur

 Filin Shirye-shiryen Ƙofar Array

 Atsararrun ƙofar filin filin(Farashin FPGA) wanihadedde kewayewanda aka tsara don daidaitawa ta abokin ciniki ko mai tsarawa bayan masana'anta - don haka kalmarfilin-mai shirye-shirye.An ƙididdige tsarin FPGA gabaɗaya ta amfani da aHarshen bayanin hardware(HDL), kama da wanda aka yi amfani da shi don antakamaiman aikace-aikace hadedde kewaye(ASIC).Zane-zane na zagayeAn yi amfani da su a baya don tantance tsarin, amma wannan yana ƙara wuya saboda zuwanlantarki zane aiki da kaikayan aiki.

FPGAs sun ƙunshi tsararru nashirye-shirye dabaru tubalan, da matsayi na haɗin haɗin gwiwar da za a sake daidaita su da ke ba da damar yin wayoyi tare.Ana iya saita tubalan dabaru don yin hadaddunayyukan haɗin gwiwa, ko aiki a matsayin mai sauƙidabaru kofofinkamarKUMAkumaXOR.A yawancin FPGAs, tubalan dabaru kuma sun haɗa daabubuwan ƙwaƙwalwar ajiya, wanda zai iya zama mai sauƙijefa-flopsko ƙarin cikakkun tubalan ƙwaƙwalwar ajiya.^[1]Ana iya sake tsara FPGA da yawa don aiwatar da daban-dabandabaru ayyuka, kyale mreconfigurable kwamfutakamar yadda aka yi a cikinsoftware na kwamfuta.

FPGAs suna da rawar gani a cikisaka tsarinci gaba saboda iyawar su don fara haɓaka software na tsarin lokaci guda tare da kayan aiki, ba da damar kwaikwaiyon tsarin aiki a farkon lokacin haɓakawa, da ba da damar gwaji na tsarin daban-daban da ƙirƙira ƙira kafin kammala tsarin gine-gine.^[2]

Tarihi[gyara]

Masana'antar FPGA ta fito dagaƘwaƙwalwar ajiya mai karantawa kawai(PROM) kumana'urorin dabaru masu shirye-shirye(PLD).PROMs da PLDs duka suna da zaɓi na tsara shirye-shirye a batches a masana'anta ko a cikin filin (wanda za a iya tsara filin).^[3]

AlteraAn kafa shi a cikin 1983 kuma ya ba da na'urar dabaru ta farko da za a iya sake fasalin masana'antar a cikin 1984 - EP300 - wacce ke nuna taga ma'adini a cikin kunshin wanda ya ba masu amfani damar haskaka fitilar ultraviolet akan mutu don gogewa.EPROMsel waɗanda suka riƙe tsarin na'urar.^[4]

Xilinxya samar da filin kasuwanci na farko-mai shirigate tsararrua shekarar 1985^[3]Saukewa: XC2064.^[5]XC2064 yana da ƙofofin shirye-shirye da haɗin haɗin kai tsakanin ƙofofin, farkon sabuwar fasaha da kasuwa.^[6]XC2064 yana da 64 gyare-gyaren dabaru (CLBs), tare da shigarwa guda uku.duba teburi(LUT).^[7]

A shekarar 1987, daCibiyar Yakin Naval Surfaceya ba da kuɗin wani gwaji da Steve Casselman ya gabatar don haɓaka kwamfutar da za ta aiwatar da ƙofofin sake fasalin 600,000.Casselman ya yi nasara kuma an ba da takardar shaidar da ta danganci tsarin a cikin 1992.^[3]

Altera da Xilinx sun ci gaba da girma ba tare da ƙalubale ba kuma cikin sauri sun girma daga 1985 zuwa tsakiyar 1990s lokacin da masu fafatawa suka tsiro, suna lalata wani yanki mai mahimmanci na kasuwar su.By 1993, Actel (yanzuMicrosemi) ya kasance kusan kashi 18 cikin dari na kasuwa.^[6]

1990s lokaci ne na haɓaka cikin sauri ga FPGAs, duka a cikin haɓakar kewayawa da ƙarar samarwa.A farkon 1990s, FPGAs an fara amfani da su a cikisadarwakumasadarwar.A ƙarshen shekaru goma, FPGAs sun sami hanyar shiga mabukaci, motoci, da aikace-aikacen masana'antu.^[8]

A shekara ta 2013, Altera (kashi 31), Actel (kashi 10) da Xilinx (kashi 36) tare suna wakiltar kusan kashi 77 na kasuwar FPGA.^[9]

Kamfanoni kamar Microsoft sun fara amfani da FPGAs don haɓaka babban aiki, tsarin ƙididdiga (kamarcibiyoyin bayanaimasu aiki da suInjin bincike na Bing), sabodaaiki da wattAmfanin FPGAs suna bayarwa.^[10]Microsoft ya fara amfani da FPGAs zuwahanzartaBing a cikin 2014, kuma a cikin 2018 ya fara tura FPGAs a kan sauran ayyukan cibiyar bayanai don aikin su.Azure girgije kwamfutadandamali.^[11]

Jaddun lokaci masu zuwa suna nuna ci gaba a fannoni daban-daban na ƙirar FPGA:

Gates

• 1987: Ƙofofin 9,000, Xilinx^[6]
• 1992: 600,000, Sashen Yakin Sojan Ruwa^[3]
• Farkon 2000s: miliyoyin^[8]
• 2013: 50 miliyan, Xilinx^[12]

Girman kasuwa

• 1985: Farkon kasuwanci FPGA: Xilinx XC2064^[5][6]
• 1987: $14 miliyan^[6]
• c.1993: $385 miliyan^{[6][gaza tabbatarwa]}
• 2005: $1.9 biliyan^[13]
• Kiyasin 2010: dala biliyan 2.75^[13]
• 2013: $5.4 biliyan^[14]
• 2020 kimanta: $9.8 biliyan^[14]

Zane ya fara

Afara zanesabon ƙirar al'ada ce don aiwatarwa akan FPGA.

• 2005: 80,000^[15]
• 2008: 90,000^[16]

Zane[gyara]

FPGAs na zamani suna da albarkatu masu yawa nadabaru kofofinda RAM tubalan aiwatar da hadaddun lissafin dijital.Kamar yadda ƙirar FPGA ke amfani da ƙimar I/O da sauri da kuma bayanan bidirectionbas, ya zama ƙalubale don tabbatar da daidaitaccen lokacin ingantaccen bayanai a cikin lokacin saiti da lokacin riƙewa.

Tsarin beneyana ba da damar rarraba albarkatu a cikin FPGAs don saduwa da waɗannan matsalolin lokaci.Ana iya amfani da FPGAs don aiwatar da kowane aiki na hankali wanda waniASICiya yi.Ikon sabunta ayyukan bayan aikawa,sake daidaita sashina wani sashi na zane^[17]da ƙananan farashin aikin injiniya marasa maimaitawa dangane da ƙirar ASIC (duk da yawan farashin naúrar gabaɗaya), yana ba da fa'idodi ga aikace-aikace da yawa.^[1]

Wasu FPGAs suna da fasalin analog ban da ayyukan dijital.Mafi na kowa fasalin analog shine mai shirye-shiryekashe kudiakan kowane fil ɗin fitarwa, ƙyale injiniyan ya saita ƙananan ƙima akan filaye masu sauƙi waɗanda ba haka bazobekobiyuba za a yarda da shi ba, kuma don saita farashi mafi girma akan filaye masu nauyi a kan tashoshi masu sauri waɗanda in ba haka ba za su yi aiki a hankali.^[18][19]Hakanan na kowa suna quartz-crystal oscillators, on-chip juriya- capacitance oscillators, damadaukai masu kulle-kulletare da sakaoscillators masu sarrafa wutar lantarkiana amfani da shi don tsara agogo da gudanarwa da kuma don babban saurin serializer-deserializer (SERDES) na watsa agogo da dawo da agogo mai karɓa.Ainihin gama gari suna da bambancimasu kwatantaa kan abubuwan shigar da aka tsara don haɗa susigina daban-dabantashoshi.Kadan"gauraye siginaFPGAs” sun haɗa na gefeAnalog-to-dijital masu juyawa(ADC) dadijital-zuwa-analog masu juyawa(DACs) tare da tubalan kwandishan siginar analog wanda ke ba su damar aiki azaman atsarin-on-a-chip(SoC).^[20]Irin waɗannan na'urori suna ɓatar da layi tsakanin FPGA, wanda ke ɗaukar na'urorin dijital da sifili akan masana'anta na haɗin kai na ciki, kumafilin-shirye-shiryen analog tsararru(FPAA), wanda ke ɗaukar ƙimar analog akan masana'anta na haɗin haɗin kai na ciki.

Dabarun dabaru[gyara]

Babban labarin:Toshe dabaru

Misali mai sauƙi na kwatankwacin kwayar halitta (LUT -Teburin dubawa, FA -Cikakken ƙara, DFF -Nau'in D-flip-flop)

Mafi yawan gine-ginen FPGA ya ƙunshi tsararru nadabaru tubalan(wanda ake kira configurable logic blocks, CLBs, ko logical array blocks, LABs, dangane da mai siyarwa)I/O pads, da kuma tashoshi masu sarrafa kansu.^[1]Gabaɗaya, duk tashoshi masu rarrabawa suna da faɗi ɗaya (yawan wayoyi).Yawancin I/O pads na iya dacewa da tsayin jere ɗaya ko faɗin shafi ɗaya a cikin tsararru.

"Dole ne a tsara da'irar aikace-aikacen zuwa FPGA tare da isassun albarkatu.Yayin da adadin CLBs/LABs da I/Os da ake buƙata ana iya tantance su cikin sauƙi daga ƙira, adadin waƙoƙin da ake buƙata na iya bambanta da yawa har ma tsakanin ƙira da ƙima iri ɗaya.(Misali, acrossbar canzayana buƙatar tuƙi fiye da asystolic tsarintare da ƙidaya kofa ɗaya.Tun da waƙoƙin da ba a yi amfani da su ba suna haɓaka farashi (da rage yawan aiki) na ɓangaren ba tare da samar da wani fa'ida ba, masana'antun FPGA suna ƙoƙarin samar da isassun waƙoƙi ta yadda mafi yawan ƙira waɗanda za su dace cikin sharuddanduba teburi(LUTs) da I/Os na iya zamakore.An ƙaddara wannan ta kiyasi kamar waɗanda aka samo dagaMulkin hayako kuma ta gwaje-gwaje tare da ƙirar da ake da su."^[21]Tun daga shekarar 2018,hanyar sadarwa-on-chipAna haɓaka gine-ginen hanyoyin zirga-zirga da haɗin kai.^{[abin da ake bukata]}

Gabaɗaya, toshe dabaru ya ƙunshi ƴan ƙwayoyin ma'ana (wanda ake kira ALM, LE, yanki da sauransu).Tantanin halitta na yau da kullun ya ƙunshi shigarwar LUT 4, acikakken ƙara(FA) aNau'in D-flip-flop.Ana iya raba waɗannan zuwa LUTs masu shigarwa 3 guda biyu.A cikiyanayin al'adaan haɗa su zuwa LUT mai shigarwa 4 ta farkonmultiplexer(mux).A cikiilmin lissafiyanayin, abubuwan da suke samarwa ana ciyar da su zuwa ƙara.Zaɓin yanayin an tsara shi cikin mux na biyu.Fitowar na iya zama ko daiaiki tarekoasynchronous, dangane da shirye-shiryen mux na uku.A aikace, gabaɗayan ko sassan adder suneadana azaman ayyukaa cikin LUTs don adanawasarari.^[22][23][24]

Hard tubalan[gyara]

Iyalan FPGA na zamani suna faɗaɗa kan abubuwan da ke sama don haɗa da babban matakin aiki da aka gyara a cikin silicon.Samun waɗannan ayyuka gama-gari da aka haɗa a cikin kewayawa yana rage yankin da ake buƙata kuma yana ba waɗancan ayyukan haɓaka gudu idan aka kwatanta da gina su daga madaidaitan ma'ana.Misalan waɗannan sun haɗa damasu yawa, gamayyaDSP tubalan,na'urori masu sarrafawa, Babban saurin I/O dabaru da sakawaabubuwan tunawa.

FPGA mafi girma na iya ƙunsar babban guduMulti-gigabit transceiverskumahard IP-coreskamarna'ura mai sarrafawa,Ethernet matsakaicin damar sarrafawa raka'a,PCI/PCI Expressmasu sarrafawa, da masu kula da ƙwaƙwalwar ajiya na waje.Waɗannan muryoyin suna wanzu tare da masana'anta na shirye-shirye, amma an gina su daga cikitransistormaimakon LUTs don haka suna da matakin ASICyikumaamfani da wutar lantarkiba tare da cin abinci mai yawa na albarkatun masana'anta ba, barin ƙarin masana'anta kyauta don ƙayyadaddun dabaru na aikace-aikacen.Na'urorin jigilar gigabit masu yawa kuma sun ƙunshi shigarwar analog mai girma da kayan aiki tare da serializers masu saurin sauri da na'urori, abubuwan da ba za a iya gina su daga cikin LUTs ba.Babban matakin aikin Layer na jiki (PHY) kamarlayi codeingmaiyuwa ko ba za a iya aiwatar da su tare da serializers da deserializers a cikin tunani mai wuyar fahimta, dangane da FPGA.