XC2C256-7TQG144C QFP144 xilinx kwakwalwan kwamfuta 1.8V Yawan shigar da fitarwa 118 FLASH PLD IC lantarki

Halayen Samfur

Ba da rahoton Kuskuren Bayanin Samfur

Duba Makamantan

Takardu & Mai jarida

Rarraba Muhalli & Fitarwa

 Hadadden na'urar dabaru (CPLD) ita ce na'urar dabaru tare da gaba daya shirye-shirye AND/KO arrays da macrocells.Macrocells su ne manyan tubalan ginin CPLD, waɗanda ke ƙunshe da hadaddun ayyuka na dabaru da dabaru don aiwatar da maganganu na yau da kullun.DA/KO tsararraki ana iya sake tsara su gaba ɗaya kuma suna da alhakin yin ayyuka daban-daban na dabaru.Hakanan za'a iya bayyana macrocells azaman tubalan aiki waɗanda ke da alhakin aiwatar da dabaru na tsari ko haɗakarwa.

 Hadadden na'urar dabaru na shirye-shirye sabon samfuri ne idan aka kwatanta da na'urorin dabaru na farko kamar programmable loggic arrays (PLAs) da Programmable Array Logic (PAL).Na'urorin dabaru na farko ba su da shirye-shirye, don haka an gina ma'anar ta hanyar haɗa kwakwalwan kwamfuta da yawa tare.CPLD yana da sarƙaƙƙiya tsakanin PALs da tsararrun ƙofofi (FPGAs).Hakanan yana da fasalulluka na gine-gine na PALs da FPGAs.Babban bambancin tsarin gine-gine tsakanin CPLD da FPGA shine FPGAs sun dogara ne akan teburin dubawa, yayin da CPLDs sun dogara ne akan kofofin teku.

Abubuwan gama gari na CPLDs da FPGAs sune duka biyun suna da adadi mai yawa na ƙofofi da tanadi masu sassauƙa don dabaru.Ganin cewa fasalulluka gama gari tsakanin CPLDs da PALs sun haɗa da ƙwaƙwalwar sanyi mara mara ƙarfi.CPLDs jagorori ne a kasuwa na na'urorin dabaru masu iya shirye-shirye, suna da fa'idodi da yawa kamar shirye-shirye na ci gaba, ƙarancin farashi, kasancewa marasa ƙarfi da sauƙin amfani.

 Ahadaddun na'urar dabaru na shirye-shirye(Farashin CPLD) ba ana'urar dabaru na shirye-shiryetare da sarkakiya tsakanin naPALskumaFPGAs, da kuma siffofin gine-gine na duka biyu.Babban tubalan ginin CPLD shine amacrocell, wanda ya ƙunshi aiwatar da dabarudisjunctive al'ada formmaganganu da ƙarin ayyuka na dabaru na musamman.

Siffofin[gyara]

Wasu fasalulluka na CPLD suna gama gari dasuPALs:

• Ƙwaƙwalwar ƙira mara ƙarfi.Ba kamar FPGA da yawa ba, saitin wajeROMba a buƙata ba, kuma CPLD na iya aiki nan da nan akan fara tsarin.
• Don na'urorin CPLD da yawa na gado, hanyar turawa tana iyakance mafi yawan tubalan dabaru don samun shigarwa da siginonin fitarwa da aka haɗa zuwa fil na waje, rage damammaki don ajiya na cikin gida da zurfafa tunani.Wannan yawanci ba lamari bane ga manyan CPLDs da sabbin iyalai na samfur na CPLD.

Sauran fasalulluka sun yi tarayya da suFPGAs:

• Akwai adadi mai yawa na ƙofofi.CPLDs yawanci suna da kwatankwacin dubunnan zuwa dubun dubatardabaru kofofin, ba da damar aiwatar da na'urorin sarrafa bayanai masu rikitarwa matsakaici.PALs yawanci suna da 'yan ɗaruruwan daidai ƙofa a mafi yawa, yayin da FPGAs yawanci ke tashi daga dubun dubbai zuwa miliyan da yawa.
• Wasu tanade-tanade don dabaru sun fi sassauci fiye dajimlar samfurinmaganganu, gami da rikitattun hanyoyin amsawa tsakanin ƙwayoyin macro, da dabaru na musamman don aiwatar da ayyuka daban-daban da aka saba amfani da su, kamar su.lamba ilmin lissafi.

Babban bambanci tsakanin babban CPLD da ƙaramar FPGA shine kasancewar ƙwaƙwalwar kwakwalwar da ba ta da ƙarfi a cikin CPLD, wanda ke ba da damar amfani da CPLDs don "bootloader"ayyukan, kafin mika iko ga wasu na'urori ba su da nasu ajiyar shirye-shiryen dindindin.Kyakkyawan misali shine inda ake amfani da CPLD don loda bayanan daidaitawa don FPGA daga ƙwaƙwalwar mara mara ƙarfi.^[1]

Bambance-bambance[gyara]

CPLDs wani mataki ne na juyin halitta daga ƙananan na'urori waɗanda suka gabace su,PLAs(wanda aka fara jigilar shiAlamu), kumaPALs.Wadannan su kuma sun gabace sudaidaitattun dabarusamfurori, waɗanda ba su ba da wani shiri ba kuma an yi amfani da su don gina ayyukan tunani ta hanyar haɗa nau'ikan kwakwalwan kwamfuta da yawa (ko ɗaruruwan su) tare (yawanci tare da wiring akan allon da'irar da aka buga ko allo, amma wani lokacin, musamman don samfuri, ta amfani da su.kunsa wayawaya).

Babban bambanci tsakanin FPGA da na'urorin gine-gine na CPLD shine cewa CPLDs sun dogara ne akan cikiduba-up tebur(LUTs) yayin da FPGAs ke amfanidabaru tubalan.